Embodiments of the inventive concept relate to a semiconductor device having a selectively nitrided gate insulating layer and to a method of fabricating the selectively nitrided gate insulating layer.
A semiconductor device may include a gate insulating layer and a gate electrode, which may be formed on a substrate with n-channel metal oxide semiconductor (NMOS) and p-channel metal oxide semiconductor (PMOS) regions. Transistors provided on the NMOS region may be configured to have different properties from those on the PMOS region.